Non-volatile resistance variable devices and method of forming same, analog memory devices and method of forming same, programmable memory cell and method of forming same, and method of structurally changing a non-volatile device

ABSTRACT

In one implementation, a non-volatile resistance variable device includes a body formed of a voltage or current controlled resistance setable material, and at least two spaced electrodes on the body. The body includes a surface extending from one of the electrodes to the other of the electrodes. The surface has at least one surface striation extending from proximate the one electrode to proximate the other electrode at least when the body of said material is in a highest of selected resistance setable states. In one implementation, a method includes structurally changing a non-volatile device having a body formed of a voltage or current controlled resistance setable material and at least two spaced electrodes on the body. The body has a surface extending from one of the electrodes to the other of the electrodes, and the surface is formed to comprise at least one surface striation extending from proximate the one electrode to proximate the other electrode. The method includes applying a first voltage between the one and the other electrodes to establish a negative and a positive electrode effective to form a conductive path formed of at least some material derived from the voltage or current controlled resistance setable material and on the surface along at least a portion of the at least one striation.

TECHNICAL FIELD

[0001] This invention relates to non-volatile resistance variabledevices, to analog memory devices, to programmable memory cells, and tomethods of forming such devices, to programming such devices andstructurally changing such devices.

BACKGROUND OF THE INVENTION

[0002] Semiconductor fabrication continues to strive to make individualelectronic components smaller and smaller, resulting in ever denserintegrated circuitry. One type of integrated circuitry comprises memorycircuitry where information is stored in the form of binary data. Thecircuitry can be fabricated such that the data is volatile ornon-volatile. Volatile storing memory devices result in loss of datawhen power is interrupted. Non-volatile memory circuitry retains thestored data even when power is interrupted.

[0003] This invention was principally motivated in making improvementsto the design and operation of memory circuitry disclosed in the Kozickiet al. U.S. Pat. Nos. 5,761,115; 5,896,312; 5,914,893; and 6,084,796,which ultimately resulted from U.S. patent application Ser. No.08/652,706, filed on May 30, 1996, disclosing what is referred to as aprogrammable metallization cell. Such a cell includes opposingelectrodes having an insulating dielectric material receivedtherebetween. Received within the dielectric material is a fast ionconductor material. The resistance of such material can be changedbetween highly insulative and highly conductive states. In its normalhigh resistive state, to perform a write operation, a voltage potentialis applied to a certain one of the electrodes, with the other of theelectrode being held at zero voltage or ground. The electrode having thevoltage applied thereto functions as an anode, while the electrode heldat zero or ground functions as a cathode. The nature of the fast ionconductor material is such that it undergoes a chemical and structuralchange at a certain applied voltage. Specifically, at some suitablethreshold voltage, plating of metal from metal ions within the materialbegins to occur on the cathode and grows or progresses through the fastion conductor toward the other anode electrode. With such voltagecontinued to be applied, the process continues until a single conductivedendrite or filament extends between the electrodes, effectivelyinterconnecting the top and bottom electrodes to electrically short themtogether.

[0004] Once this occurs, dendrite growth stops, and is retained when thevoltage potentials are removed. Such can effectively result in theresistance of the mass of fast ion conductor material between electrodesdropping by a factor of 1,000. Such material can be returned to itshighly resistive state by reversing the voltage potential between theanode and cathode, whereby the filament disappears. Again, the highlyresistive state is maintained once the reverse voltage potentials areremoved. Accordingly, such a device can, for example, function as aprogrammable memory cell of memory circuitry.

[0005] The highly conductive filament which forms between theillustrated electrodes in the fast ion conductor material tends to format a surface thereof, as opposed to centrally within the mass ofmaterial. It has been discovered that defects on such surface somehowcreate an electrochemical path of least resistance along which theconductive filament during programming will form. Accordingly, theforming filament may serpentine along a path of least resistance at theperipheral edge surface of the material between the two electrodes,thereby resulting in variability in the amount of time it takes toprogram two devices of otherwise common dimensions. It would bedesirable to develop structures and methods which overcome this writetime variability.

[0006] While principally motivated utilizing the above-describedcircuitry and addressing the stated specific objective, the invention isin no way so limited. Rather, the invention is more broadly directed toany non-volatile resistance variable devices, including methods offabricating, programming and structurally changing the same, with theinvention only being limited by the accompanying claims appropriatelyinterpreted in accordance with the doctrine of equivalents.

SUMMARY

[0007] The invention comprises non-volatile resistance variable devices,analog memory devices, programmable memory cells, and methods of formingsuch devices, programming such devices and structurally changing suchdevices. In one implementation, a non-volatile resistance variabledevice includes a body formed of a voltage or current controlledresistance setable material, and at least two spaced electrodes on thebody. The body includes a surface extending from one of the electrodesto the other of the electrodes. The surface has at least one surfacestriation extending from proximate the one electrode to proximate theother electrode at least when the body of said material is in a highestof selected resistance setable states.

[0008] In one implementation, a method includes structurally changing anon-volatile device having a body formed of a voltage or currentcontrolled resistance setable material and at least two spacedelectrodes on the body. The body has a surface extending from one of theelectrodes to the other of the electrodes, and the surface is formed tocomprise at least one surface striation extending from proximate the oneelectrode to proximate the other electrode. The method includes applyinga first voltage between the one and the other electrodes to establish anegative and a positive electrode effective to form a conductive pathformed of at least some material derived from the voltage or currentcontrolled resistance setable material and on the surface along at leasta portion of the at least one striation.

BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Preferred embodiments of the invention are described below withreference to the following accompanying drawings.

[0010]FIG. 1 is a diagrammatic sectional view of a semiconductor waferfragment in process in accordance with an aspect of the invention.

[0011]FIG. 2 is a view of the FIG. 1 wafer fragment at a processing stepsubsequent to that shown by FIG. 1, and taken relative to line 2-2 inFIG. 3.

[0012]FIG. 3 is a diagrammatic top view of FIG. 2.

[0013]FIG. 4 is a view of the FIG. 1 wafer fragment at a processing stepsubsequent to that shown by FIG. 2.

[0014]FIG. 5 is a diagrammatic top view of a portion of FIG. 4.

[0015]FIG. 6 is a view of the FIG. 1 wafer fragment at a processing stepsubsequent to that shown by FIG. 4.

[0016]FIG. 7 is a view of the FIG. 1 wafer fragment at a processing stepsubsequent to that shown by FIG. 6.

[0017]FIG. 8 is a diagrammatic top view of a portion of FIG. 7.

[0018]FIG. 9 is a diagrammatic top view like FIG. 8, but showing analternate embodiment from that of FIG. 8.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] This disclosure of the invention is submitted in furtherance ofthe constitutional purposes of the U.S. Patent Laws “to promote theprogress of science and useful arts” (Article 1, Section 8).

[0020] Referring to FIG. 1, a semiconductor wafer fragment 10 is shownin but one preferred embodiment of a method of forming a non-volatileresistance variable device. By way of example only, example such devicesinclude programmable metallization cells and programmable opticalelements of the patents referred to above, further by way of exampleonly including programmable capacitance elements, programmableresistance elements, programmable antifuses of integrated circuitry andprogrammable memory cells of memory circuitry. The above patents areherein incorporated by reference. The invention contemplates thefabrication techniques and structure of any existing non-volatileresistance variable device, as well as yet-to-be developed such devices.Further by way of example only, the invention also contemplates formingnon-volatile resistance variable devices into an analog memory devicecapable of being set and reset to a resistance value over a continuousrange of resistance values which is measure of a voltage applied to itover a corresponding range of voltage values. By way of example only,such are disclosed in U.S. Pat. No. 5,360,981, which resulted from aserial number application Ser. No. 194,628, filed on May 4, 1990,listing Owen et al. as inventors. This '981 patent is fully hereinincorporated by reference. In the context of this document, the term“semiconductor substrate” or “semiconductive substrate” is defined tomean any construction comprising semiconductive material, including, butnot limited to, bulk semiconductive materials such as a semiconductivewafer (either alone or in assemblies comprising other materialsthereon), and semiconductive material layers (either alone or inassemblies comprising other materials). The term “substrate” refers toany supporting structure, including, but not limited to, thesemiconductive substrates described above. Also in the context of thisdocument, the term “layer” encompasses both the singular and the plural.Further, it will be appreciated by the artisan that “resistance setablesemiconductive material” and “resistance variable device” includesmaterials and devices wherein a property or properties in addition toresistance is/are also varied. For example, and by way of example only,the material's capacitance and/or inductance might also be changed inaddition to resistance.

[0021] Semiconductor wafer fragment 10 comprises a bulk monocrystallinesemiconductive material 12, for example silicon, having an insulativedielectric layer 14, for example silicon dioxide, formed thereover. Aconductive first electrode material 16 is formed over dielectric layer14. By way of example only, preferred materials include any of thosedescribed in the incorporated Kozicki et al. and/or Owen et al. patentsreferred to above, in conjunction with the preferred type of devicebeing fabricated. A dielectric layer 18 is formed over first electrodelayer 16. Silicon nitride is a preferred example.

[0022] Referring to FIGS. 2 and 3, a masking layer 20, for examplephotoresist, is received over layer 18. An opening 22 is formed intomasking layer 20 and dielectric layer 18 to first electrode layer 16.Opening 22 includes masking layer sidewalls 24 and dielectric layersidewalls 26. Forming such opening is conducted in a manner whichproduces at least one surface striation 28 in at least a portion ofopening sidewalls 26. Typically and preferably, a plurality of suchsurface striations 28 are formed, and preferably extend from proximatefirst electrode layer 14 along the substantial entirety of opening 22within dielectric layer 18 to the outer surface thereof. Accordingly, inthe most preferred embodiment, sidewall striations 28 extend in asubstantially straight line, and preferably of least possible distance,from electrode layer 16 to the outermost surface of layer 18.

[0023] Most preferably, the forming of opening 22 within dielectriclayer 18 is conducted by etching, and with sidewall striations 28 beingformed during the initial dielectric layer 18 etching to form opening 22therein. Alternately by way of example only, the manner of forming cancomprise forming the at least one sidewall striation after dielectriclayer 18 etching to initially form the opening and expose the electrodelayer without significant striation forming therein. The illustrated andpreferred manner comprises forming the at least one surface striation insidewalls 24 of masking layer 20 which overlies dielectric layer 18, andthereafter etching into dielectric layer 18 to form opening 22 thereinusing masking layer 20 as an etching mask and thereby patterning thestriations therefrom into opening 22 within layer 18.

[0024] Various techniques are known to the artisan for creatingstriations in a contact opening. By way of example only, such aredisclosed in U.S. Pat. No. 5,238,862 to Blalock et al., filed on Mar.18, 1992, and U.S. patent application Ser. No. 09/492,738, filed Jan.27, 2000, entitled “Plasma Etching Methods”, and listing Becker, Howardand Donahoe as inventors. These documents are herein fully incorporatedby reference. The invention, of course, contemplates these and otherstriation-forming techniques, whether existing or yet-to-be developed.

[0025] Referring to FIGS. 4 and 5, masking layer 20 has been removed anda voltage or current controlled resistance setable material is formedwithin opening 22 in layer 18 in electrical connection with firstelectrode layer 16. Example preferred materials include voltage orcurrent controlled resistance setable semiconductive material, forexample that disclosed in the Owen et al. patent referred to herein.Further, exemplary preferred material includes fast ion conductormaterial, such as metal ion-containing dielectric material or metalion-containing semiconductive material, as disclosed in the Kozicki etal. patents referred to herein. Alternate materials are contemplated, ofcourse, whether existing or yet-to-be developed. In the context of thisdocument, voltage or current controlled resistance setable materialincludes any material whose resistance can be non-volatilely varied inat least some manner by application of different voltages or currentstherethrough.

[0026] Preferably as shown, such material 30 is formed to have a surface32 at least a portion of which extends along the dielectric layerstriations 28 to form at least one surface striation 34 (FIG. 5) in thesurface portion of material 30. In the preferred and illustratedembodiment, the at least one surface portion striation 32 is received ondielectric layer 18 and therefore contacts the same. In the preferredembodiment, material 30 is shown as having been planarized relative todielectric layer 18.

[0027] Referring to FIG. 6, a second electrode layer 40 is formed inelectrical connection with voltage or current controlled resistancesetable material 30 within opening 22 of dielectric 18. Accordingly,striations 34 of material 30 in the most preferred embodiment extendfrom proximate first electrode 16 to proximate second electrode 40, andmost preferably in a substantially straight line of least possibledistance therebetween. FIG. 6 depicts, in structure and method, anexemplary body 30 of voltage or current controlled resistance setablematerial having at least two spaced electrodes 16 and 40 receivedthereon. The body comprises a surface extending from one of theelectrodes to the other of the electrodes, with the surface being formedto comprise at least one surface striation extending from proximate theone electrode to proximate the other electrode, at least when the bodyof the material is in a highest of selected resistance states. FIG. 6illustrates but one exemplary non-volatile resistance variable device,and a method of fabricating. Alternate methods and structures beyondthat shown are, of course, contemplated. By way of example only, thevarious components could be laterally oriented relative to one anotheras opposed to successively deposited layers atop one another. Otherorientations are, of course, contemplated.

[0028] The invention also contemplates methods of structurally changinga non-volatile device. The method comprises applying a first voltagebetween two electrodes to establish a negative and a positive electrodeeffective to form a conductive path formed of at least some materialderived from voltage or current controlled resistance setable materialreceived between the electrodes, and on the surface of such materialalong at least a portion of at least one striation formed therein. Suchconductive path may extend partially between the electrodes, oralternately, entirely between the electrodes, effectively electricallyshorting the electrodes together. The invention also comprises, afterapplying such first voltage, applying a second voltage opposite inpolarity to the first voltage to reverse formation of the conductivepath, either partially or entirely. The invention also comprises, afterapplying such first voltage, applying sufficiently high current to breakthe dendrite/filament. Exemplary techniques for accomplishing such aredisclosed in the Kozicki et al. and Owen et al. patents.

[0029] The invention also contemplates fabrication and processingrelative to analog memory devices capable of being set and reset to aresistance value over a continuous range of resistance values, which isa measure of a voltage or current applied to it over a correspondingrange of voltage or current values. An example is described in the Owenet al. patent.

[0030]FIGS. 7, 8 and 9 illustrate exemplary embodiments involvingprogramming or otherwise formation of a conductive path between theelectrodes. For example, FIGS. 7 and 8 illustrate a conductivepath/dendrite 50 being formed in the sidewall portion of material 20along an apex form of a striation 34. FIG. 9 illustrates an alternateembodiment wherein a conductive path/dendrite 50 a forms at and along avalley portion of a striation 34. The invention also contemplatesformation of a conductive path/dendrite anywhere along the surfacebetween path 50 of FIG. 8 and path 50 a of FIG. 9.

[0031] In compliance with the statute, the invention has been describedin language more or less specific as to structural and methodicalfeatures. It is to be understood, however, that the invention is notlimited to the specific features shown and described, since the meansherein disclosed comprise preferred forms of putting the invention intoeffect. The invention is, therefore, claimed in any of its forms ormodifications within the proper scope of the appended claimsappropriately interpreted in accordance with the doctrine ofequivalents.

1. A method of forming a non-volatile resistance variable device, comprising: forming a first electrode over a substrate; forming a dielectric layer over the first electrode; forming an opening having sidewalls into the dielectric layer to the first electrode in a manner which produces at least one surface striation in at least a portion of the opening sidewalls; forming voltage or current controlled resistance setable semiconductive material within the opening in electrical connection with the first electrode, said material having a surface at least a portion of which extends along the at least one dielectric layer striation to form at least one surface striation in the surface portion; and forming a second electrode in electrical connection with the voltage or current controlled resistance setable semiconductive material received within the opening.
 2. The method of claim 1 comprising forming the non-volatile resistance variable device into a programmable memory cell of memory circuitry.
 3. The method of claim 1 comprising forming the non-volatile resistance variable device into an antifuse of integrated circuitry.
 4. The method of claim 1 comprising forming the non-volatile resistance variable device into a programmable resistance element of integrated circuitry.
 5. The method of claim 1 comprising forming the non-volatile resistance variable device into a programmable capacitance element of integrated circuitry.
 6. The method of claim 1 comprising forming the non-volatile resistance variable device into a programmable optical element of integrated circuitry.
 7. The method of claim 1 comprising forming the non-volatile resistance variable device into a programmable metallization cell.
 8. The method of claim 1 comprising forming the non-volatile resistance variable device into an analog memory device capable of being set and reset to a resistance value over a continuous range of resistance values which is a measure of a voltage applied to it over a corresponding range of voltage values.
 9. The method of claim 1 comprising forming a plurality of the surface striations in the opening sidewalls and the surface portion.
 10. The method of claim 1 comprising forming the at least one sidewall striation and the at least one surface portion striation to extend from proximate the first electrode to proximate the second electrode.
 11. The method of claim 1 comprising forming the at least one sidewall striation and the at least one surface portion striation to extend in a substantially straight line.
 12. The method of claim 1 comprising forming the at least one sidewall striation and the at least one surface portion striation to extend in a substantially straight line from proximate the first electrode to proximate the second electrode.
 13. The method of claim 1 comprising forming the at least one sidewall striation and the at least one surface portion striation to extend in a substantially straight line of least possible distance from proximate the first electrode to proximate the second electrode.
 14. The method of claim 1 comprising forming the at least one surface portion striation to contact the dielectric layer.
 15. The method of claim 1 wherein the forming of the opening in the dielectric layer comprises etching, the manner comprises forming at least one surface striation in a sidewall of a masking layer opening overlying the dielectric layer, and etching into the dielectric layer to form the dielectric layer opening using the masking layer as an etching mask.
 16. The method of claim 1 wherein the forming of the opening in the dielectric layer comprises etching, and the manner comprises forming the at least one sidewall striation during initial dielectric layer etching to form the opening.
 17. The method of claim 1 wherein the forming of the opening in the dielectric layer comprises etching, and the manner comprises forming the at least one sidewall striation after dielectric layer etching to the first electrode.
 18. A method of forming a non-volatile resistance variable device, comprising: forming a first electrode over a substrate; forming a dielectric layer over the first electrode; forming an opening having sidewalls into the dielectric layer to the first electrode in a manner which produces at least one surface striation in at least a portion of the opening sidewalls; forming a fast ion conductor material within the opening in electrical connection with the first electrode, said material having a surface at least a portion of which extends along the at least one dielectric layer striation to form at least one surface striation in the surface portion; and forming a second electrode in electrical connection with the fast ion conductor material received within the opening.
 19. The method of claim 18 wherein the fast ion conductor material comprises metal ion-containing dielectric material.
 20. The method of claim 18 wherein the fast ion conductor material comprises metal ion-containing semiconductive material.
 21. The method of claim 18 comprising forming a plurality of the surface striations in the opening sidewalls and the surface portion.
 22. The method of claim 18 comprising forming the at least one sidewall striation and the at least one surface portion striation to extend from proximate the first electrode to proximate the second electrode.
 23. The method of claim 18 comprising forming the at least one sidewall striation and the at least one surface portion striation to extend in a substantially straight line.
 24. The method of claim 18 comprising forming the at least one sidewall striation and the at least one surface portion striation to extend in a substantially straight line from proximate the first electrode to proximate the second electrode.
 25. The method of claim 18 comprising forming the at least one sidewall striation and the at least one surface portion striation to extend in a substantially straight line of least possible distance from proximate the first electrode to proximate the second electrode.
 26. The method of claim 18 comprising forming the at least one surface portion striation to contact the dielectric layer.
 27. The method of claim 18 wherein the forming of the opening in the dielectric layer comprises etching, the manner comprises forming at least one surface striation in a sidewall of a masking layer opening overlying the dielectric layer, and etching into the dielectric layer to form the dielectric layer opening using the masking layer as an etching mask.
 28. The method of claim 18 wherein the forming of the opening in the dielectric layer comprises etching, and the manner comprises forming the at least one sidewall striation during initial dielectric layer etching to form the opening.
 29. The method of claim 18 wherein the forming of the opening in the dielectric layer comprises etching, and the manner comprises forming the at least one sidewall striation after dielectric layer etching to the first electrode.
 30. A method of forming an analog memory device capable of being set and reset to a resistance value over a continuous range of resistance values which is a measure of a voltage applied to it over a corresponding range of voltage values, said method comprising: forming a first electrode over a substrate; forming a dielectric layer over the first electrode; forming an opening having sidewalls into the dielectric layer to the first electrode in a manner which produces at least one surface striation in at least a portion of the opening sidewalls; forming a material exhibiting said range of resistance values within the opening in electrical connection with the first electrode, said material having a surface at least a portion of which extends along the at least one dielectric layer striation to form at least one surface striation in the surface portion; and forming a second electrode in electrical connection with the voltage or current controlled resistance setable semiconductive material received within the opening.
 31. The method of claim 30 comprising forming the at least one sidewall striation and the at least one surface portion striation to extend from proximate the first electrode to proximate the second electrode.
 32. The method of claim 30 comprising forming the at least one sidewall striation and the at least one surface portion striation to extend in a substantially straight line.
 33. The method of claim 30 comprising forming the at least one sidewall striation and the at least one surface portion striation to extend in a substantially straight line from proximate the first electrode to proximate the second electrode.
 34. A method of forming a programmable memory cell comprising providing a body formed of a voltage or current controlled resistance setable material, and providing at least two spaced electrodes on the body, the body comprising a surface extending from one of the electrodes to the other of the electrodes, the surface being formed to comprise at least one surface striation extending from proximate the one electrode to proximate the other electrode at least when the body of said material is in a highest of selected resistance setable states.
 35. The method of claim 34 wherein the voltage or current controlled resistance setable material comprises semiconductive material.
 36. The method of claim 34 wherein the voltage or current controlled resistance setable material comprises metal ion-containing semiconductive material.
 37. The method of claim 34 wherein the voltage or current controlled resistance setable material comprises metal ion-containing dielectric material.
 38. The method of claim 34 comprising forming the at least one striation to extend in a substantially straight line.
 39. The method of claim 34 comprising forming the at least one striation to extend in a substantially straight line of least possible distance from proximate the one electrode to proximate the other electrode.
 40. A method of forming a non-volatile resistance variable device comprising providing a body formed of a voltage or current controlled resistance setable material, and providing at least two spaced electrodes on the body, the body comprising a surface extending from one of the electrodes to the other of the electrodes, the surface being formed to comprise at least one surface striation extending from proximate the one electrode to proximate the other electrode at least when the body of said material is in a highest of selected resistance setable states.
 41. The method of claim 40 wherein the voltage or current controlled resistance setable material comprises semiconductive material.
 42. The method of claim 40 wherein the voltage or current controlled resistance setable material comprises metal ion-containing semiconductive material.
 43. The method of claim 40 wherein the voltage or current controlled resistance setable material comprises metal ion-containing dielectric material.
 44. The method of claim 40 comprising forming the at least one striation to extend in a substantially straight line.
 45. The method of claim 40 comprising forming the at least one striation to extend in a substantially straight line of least possible distance from proximate the one electrode to proximate the other electrode.
 46. A method of structurally changing a non-volatile device having a body formed of a voltage or current controlled resistance setable material and at least two spaced electrodes on the body, with the body comprising a surface extending from one of the electrodes to the other of the electrodes, and with the surface being formed to comprise at least one surface striation extending from proximate the one electrode to proximate the other electrode, the method comprising applying a first voltage between the one and the other electrodes to establish a negative and a positive electrode effective to form a conductive path formed of at least some material derived from the voltage or current controlled resistance setable material and on the surface along at least a portion of the at least one striation.
 47. The method of claim 46 comprising after applying the first voltage, applying a second voltage opposite in polarity to the first voltage to reverse formation of the conductive path.
 48. The method of claim 46 comprising after applying the first voltage, applying a sufficiently high current to break the conductive path.
 49. A method of shorting a non-volatile device having a body formed of a voltage or current controlled resistance setable material and at least two spaced electrodes on the body, with the body comprising a surface extending from one of the electrodes to the other of the electrodes, and with the surface being formed to comprise at least one surface striation extending from proximate the one electrode to proximate the other electrode, the method comprising applying a first voltage between the one and the other electrodes to establish a negative and a positive electrode effective to form a conductive path formed of at least some material derived from the voltage or current controlled resistance setable material and on the surface along the at least one striation effective to electrically short the one and the other electrodes.
 50. The method of claim 49 comprising after applying the first voltage, applying a second voltage opposite in polarity to the first voltage to reverse formation of the conductive path.
 51. The method of claim 49 comprising after applying the first voltage, applying a sufficiently high current to break the conductive path.
 52. A non-volatile resistance variable device, comprising: a substrate having a first electrode formed thereover; a dielectric layer received over the first electrode; an opening having sidewalls extending through the dielectric layer to the first electrode, the sidewall having at least one surface striation in a portion thereof; a voltage or current controlled resistance setable semiconductive material received within the opening in electrical connection with the first electrode, said material having a portion received on the sidewall surface striation; and a second electrode in electrical connection with the voltage or current controlled resistance setable semiconductive material received within the opening.
 53. The device of claim 52 wherein the at least one sidewall striation extends in a substantially straight line.
 54. The device of claim 52 wherein the at least one sidewall striation extends from proximate the first electrode to proximate the second electrode.
 55. The device of claim 52 wherein the at least one sidewall striation extends in a substantially straight line from proximate the first electrode to proximate the second electrode.
 56. The device of claim 52 wherein the at least one sidewall striation extends in a substantially straight line of least possible distance from proximate the first electrode to proximate the second electrode.
 57. A non-volatile resistance variable device, comprising: a substrate having a first electrode formed thereover; a dielectric layer received over the first electrode; an opening having sidewalls extending through the dielectric layer to the first electrode, the sidewall having at least one surface striation in a portion thereof; a fast ion conductor material received within the opening in electrical connection with the first electrode, said material having a portion received on the sidewall surface striation; and a second electrode in electrical connection with the voltage or current controlled resistance setable semiconductive material received within the opening.
 58. The device of claim 57 wherein the fast ion conductor material comprises metal ion-containing dielectric material.
 59. The device of claim 57 wherein the fast ion conductor material comprises metal ion-containing semiconductive material.
 60. The device of claim 57 wherein the at least one sidewall striation extends in a substantially straight line.
 61. The device of claim 57 wherein the at least one sidewall striation extends from proximate the first electrode to proximate the second electrode.
 62. The device of claim 57 wherein the at least one sidewall striation extends in a substantially straight line from proximate the first electrode to proximate the second electrode.
 63. The device of claim 57 wherein the at least one sidewall striation extends in a substantially straight line of least possible distance from proximate the first electrode to proximate the second electrode.
 64. An analog memory device capable of being set and reset to a resistance value over a continuous range of resistance values which is a measure of a voltage applied to it over a corresponding range of voltage values, said device comprising: a substrate having a first electrode formed thereover; a dielectric layer received over the first electrode; an opening having sidewalls extending through the dielectric layer to the first electrode, the sidewall having at least one surface striation in a portion thereof; a material exhibiting said range of resistance values received within the opening in electrical connection with the first electrode, said material having a portion received on the surface striation; and a second electrode in electrical connection with the voltage or current controlled resistance setable semiconductive material received within the opening.
 65. The device of claim 64 wherein the at least one sidewall striation extends in a substantially straight line.
 66. The device of claim 64 wherein the at least one sidewall striation extends from proximate the first electrode to proximate the second electrode.
 67. The device of claim 64 wherein the at least one sidewall striation extends in a substantially straight line from proximate the first electrode to proximate the second electrode.
 68. The device of claim 64 wherein the at least one sidewall striation extends in a substantially straight line of least possible distance from proximate the first electrode to proximate the second electrode.
 69. A programmable memory cell comprising a body formed of a voltage or current controlled resistance setable material, and at least two spaced electrodes on the body, the body comprising a surface extending from one of the electrodes to the other of the electrodes, the surface comprising at least one surface striation extending from proximate the one electrode to proximate the other electrode at least when the body of said material is in a highest of selected resistance setable states.
 70. The cell of claim 69 wherein the voltage or current controlled resistance setable material comprises semiconductive material.
 71. The cell of claim 69 wherein the voltage or current controlled resistance setable material comprises metal ion-containing semiconductive material.
 72. The cell of claim 69 wherein the voltage or current controlled resistance setable material comprises metal ion-containing dielectric material.
 73. The cell of claim 69 wherein the at least one sidewall striation extends in a substantially straight line.
 74. The cell of claim 69 wherein the at least one sidewall striation extends in a substantially straight line of least possible distance from proximate the one electrode to proximate the other electrode.
 75. A non-volatile resistance variable device comprising a body formed of a voltage or current controlled resistance setable material, and at least two spaced electrodes on the body, the body comprising a surface extending from one of the electrodes to the other of the electrodes, the surface comprising at least one surface striation extending from proximate the one electrode to proximate the other electrode at least when the body of said material is in a highest of selected resistance setable states.
 76. The cell of claim 75 wherein the voltage or current controlled resistance setable material comprises semiconductive material.
 77. The cell of claim 75 wherein the voltage or current controlled resistance setable material comprises metal ion-containing semiconductive material.
 78. The cell of claim 75 wherein the voltage or current controlled resistance setable material comprises metal ion-containing dielectric material.
 79. The cell of claim 75 wherein the at least one sidewall striation extends in a substantially straight line.
 80. The cell of claim 75 wherein the at least one sidewall striation extends in a substantially straight line of least possible distance from proximate the one electrode to proximate the other electrode. 